Description: Verification Plans Please note: this item is printed on demand and will take extra time before it can be dispatched to you (up to 20 working days). The Five-Day Verification Strategy for Modern Hardware Verification Languages Author(s): Peet James Format: Paperback Publisher: Springer-Verlag New York Inc., United States Imprint: Springer-Verlag New York Inc. ISBN-13: 9781461350941, 978-1461350941 Synopsis Verification isjob one in today's modem design process. Statistics tell us that the verification process takes up a majority of the overall work. Chips that come back dead on arrival scream that verification is at fault for not finding the mistakes. How do we ensure success? After an accomplishment, have you ever had someone ask you, "Are you good or are you just lucky?"? Many design projects depend on blind luck in hopes that the chip will work. Other's, just adamantly rely on their own abilities to bring the chip to success. ill either case, how can we tell the difference between being good or lucky? There must be a better way not to fail. Failure. No one likes to fail. ill his book, "The Logic of Failure", Dietrich Domer argues that failure does not just happen. A series of wayward steps leads to disaster. Often these wayward steps are not really logical, decisive steps, but more like default omissions. Anti-planning if you will, an ad-hoc approach to doing something. To not plan then, is to fail.
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Location: Aldershot
End Time: 2024-11-22T12:37:21.000Z
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Book Title: Verification Plans
Number of Pages: 229 Pages
Language: English
Publication Name: Verification Plans: the Five-Day Verification Strategy for Modern Hardware Verification Languages
Publisher: Springer-Verlag New York Inc.
Publication Year: 2012
Subject: Computer Science, Physics
Item Height: 235 mm
Item Weight: 397 g
Type: Textbook
Author: Peet James
Subject Area: Electrical Engineering
Item Width: 155 mm
Format: Paperback